1. Field of the Invention
The present invention relates to a semiconductor disk system and, more particularly, to a semiconductor disk system which incorporates a plurality of flash EEPROMs (Electrically Erasable and Programmable Read-Only Memories) having a function of automatically executing a page write operation and accesses these flash EEPROMs in response to a disk access request from a host system.
The present invention also relates to a semiconductor disk system which incorporates a flash EEPROM having a plurality of pages each including a data storage area and a redundancy area and accesses this flash EEPROM in response to a disk access request from a host system.
2. Description of the Related Art
Many conventional information processing apparatuses such as workstations and personal computers use magnetic disk units as secondary storages. Although these magnetic disk units have the advantages of, e.g., a high recording reliability and a low bit cost, they also have the disadvantages that they are large in size and weak against physical shocks.
In recent years, therefore, semiconductor disk systems which are small in size and strong against physical shocks are attracting attention. A semiconductor disk system uses a flash EEPROM, which is a nonvolatile semiconductor memory whose data can be electrically, simultaneously erased, as a secondary storage of a personal computer or the like in the same way as conventional magnetic disk units are used. This semiconductor disk system does not include a mechanical movable portion such as a magnetic head or a rotary disk of a magnetic disk unit. Therefore, the semiconductor disk system hardly causes erroneous operations or failures due to physical shocks. The semiconductor disk system has another advantage of being able to be miniaturized.
Recently, various types of flash EEPROMs of a so-called command control type have been developed, in which all operation modes can be designated by external commands.
A flash EEPROM of this type includes a data register for storing data of one page and can automatically execute a data write operation from the data register to a memory cell array or a data read operation from the memory cell array to the data register without being controlled by an external system. The external system can check whether the data write or read operation of the flash EEPROM is completed in accordance with a ready/busy signal from the flash EEPROM.
When such command control type flash EEPROMs are incorporated into a semiconductor disk system, an internal controller of the semiconductor disk system is released from control of these flash EEPROMs once the controller issues a command to designate the operation mode of the flash EEPROMs. Consequently, while performing a write operation for one flash EEPROM, for example, the controller can control a write access to another flash EEPROM in a standby state.
Unfortunately, conventional semiconductor disk systems make use of a configuration in which an AND output of ready/busy signals from a plurality of flash EEPROMs is input to a controller through one signal line. Therefore, it is not possible to independently detect the operating states (read/busy) of the individual flash EEPROMs.
For this reason, the command control function of the flash EEPROM cannot be effectively utilized. As a consequence, parallel processing such as one in which a write access is performed for one flash EEPROM in a standby state while a write operation is being performed for another flash EEPROM is not currently performed.
As described above, conventional semiconductor disk systems do not employ a configuration corresponding to the command control type flash EEPROM. Therefore, even if command control type flash EEPROMs are used, it is not possible to independently detect the operating states (ready/busy) of the individual flash EEPROMs. This makes it impossible to allow a plurality of flash EEPROMs to simultaneously execute write operations, so the operating performance cannot be improved.
Generally, semiconductor disk systems have an ECC (Error Check Correction) calculating function for checking data when the data is read out or written; that is, an ECC (Error Correction Code) corresponding to the contents of data to be written in a flash EEPROM is generated and added to the data. Use of this ECC calculating function makes it possible to increase the reliability of data to be written in a flash EEPROM.
FIG. 1 shows a typical data storage format used in conventional semiconductor disk systems having the ECC calculating function.
An ECC is conventionally generated for each sector which is a disk access unit of a host system. Therefore, when sector data having a size of 512 bytes is stored across two pages of a flash EEPROM, as in FIG. 1, an ECC is stored in a position subsequent to the sector data. The number of pages of a flash EEPROM across which sector data is stored is determined by the physical size of the flash EEPROM. When a 16-Mbit flash EEPROM which is the largest of currently developed flash EEPROMs is used, 512-byte sector data is stored across two pages of the flash EEPROM as illustrated in FIG. 1. In this case, the sector data across these two pages is calculated, and an ECC is generated accordingly. The ECC thus generated is stored in the second page subsequent to the sector data.
It is unfortunate that conventional semiconductor disk systems using the data storage format as described above bring about inconvenience such as a decrease in the data storage reliability due to the error generation characteristics of a flash EEPROM to be described below.
That is, semiconductor memories such as a flash EEPROM have an error mode in which failures occur simultaneously in a plurality of memory cells connected to the same bit line, rather than in a certain specific memory cell. This error mode is brought about by, e.g., a failure of a bit line or defective contacts between a bit line and cells.
If this error mode occurs, as shown in FIG. 1, abnormal cells are produced at the same bit position of a plurality of pages of a flash EEPROM. In this case, in a conventional semiconductor disk system errors take place at two portions of a data string as an object of the ECC calculation, as in FIG. 1.
Generally, in error detection and correction using an ECC, it is readily possible to detect and correct a single error, but detection and correction for two or more errors are difficult. To successfully handle two or more errors, a complicated ECC arithmetic expression with a high data recovery capability is necessary.
If, however, an ECC arithmetic expression is complicated, the configuration of a semiconductor disk system is also complicated. In addition, since generation of an ECC during the data write and an ECC check calculation during the data read require a longer period of time, the access speed of a semiconductor disk system is lowered.
Also, in conventional semiconductor disk systems not only ECC generation and ECC calculation but error detection and error correction based on the calculation result are performed by hardware. Therefore, the number of gates is increased to realize this hardware, or the hardware itself is complicated. The result is a decrease in the read/write rate.
Furthermore, in conventional semiconductor disk systems, the write counts of individual blocks of a flash EEPROM are collectively managed by write count information stored in a particular block of that flash EEPROM. Writing data into a flash EEPROM, therefore, requires two write accesses, i.e., a write access for the data write operation and a write access for updating the write count information. This prolongs the necessary time for the data write and also exceedingly increases the number of write accesses to the block which stores the write count information compared to those of other blocks. This results in a shortened service life of the flash EEPROM.
As described above, the physical structure of a flash EEPROM is not well considered in conventional semiconductor disk systems. For this reason, no satisfactory storage reliability can be obtained even if the ECC calculating function is provided. Additionally, since the pieces of write count information are concentratedly stored in a specific block, the write count of that block alone is increased. This shortens the service life of a flash EEPROM.